This invention relates generally to booting processor-based systems.
Many systems may be designed to startup, operate and store data using a non-volatile storage media. There are many types of non-volatile storage media including disk and tape drives. Silicon-based, battery backed volatile memory systems and non-volatile memory systems are also available. Some computing applications do not require the vast amounts of storage space available through disk and tape drives. In some cases it may be impractical to use these media because of environmental limitations. Battery backed semiconductor memory systems may provide suitable storage while the system is not operating, but reliability may be sacrificed because of limited battery lifetimes. For some systems, non-volatile semiconductor memory can provide significant storage at an attractive cost.
One type of memory which may be useful for replacing disk and tape drives is FLASH memory. FLASH memory is re-programmable, relatively fast and reasonably economical. The FLASH memory interface which interfaces a processor-based system to the FLASH memory may be located at three possible locations. It may be located on a legacy or Industry Standard Architecture (ISA) bus, on a Peripheral Components Interconnect (PCI) bus, or on the host bus. Typically, the host bus cannot be heavily loaded due to speed considerations. Thus, it may be impractical to add another host-to-FLASH device to the host bus.
Placing the FLASH memory on the ISA bus requires dedicated logic to decode addresses and to provide buffers and data steering. The ISA solution is relatively slow and may limit the total amount of FLASH memory that is available.
The PCI bus presents an easy to implement interface that can use current chipset technologies from the host processor bus. The PCI bus has good performance, industry standard protocols and provisions for system boot control.
However, placing the memory on the PCI bus creates a problem during boot up. Since generally the PCI devices are not configured until after the boot up sequence, the Basic Input/Output System (BIOS) is normally stored on a second semiconductor read only memory, on the legacy or ISA bus, which is accessible during the boot sequence. Additional cost is incurred by using two semiconductor memories, one on the PCI bus and one on the ISA bus.
Thus, there is a continuing need for a way to enable re-programmable non-volatile semiconductor memory to be located on the PCI bus without using a second memory on a different bus to store the basic input/output system.
In accordance with one aspect, a method of implementing a processor-based system includes storing system boot instructions on a programmable, non-volatile memory coupled to a bus that is configured after the boot sequence. The instructions stored in the non-volatile memory are accessed in the process of booting the processor-based system.
Other aspects are set forth in the accompanying detailed description and claims.